Current semiconductor technology uses silicides as contacts to the source/drain (S/D) regions and gate electrodes of the devices that are fabricated upon a Si substrate in CMOS transistors. Silicides are metal compounds that are thermally stable and provide for low electrical resistivity at the interface between the Si and the silicide film.
Schottky FETs may have relatively low parasitic resistance and gate-to-drain parasitic capacitance clue to the lack of raised source/drain regions as well as abrupt source/drain junctions. A Schottky barrier height (SBH) at the source/drain junction approaching zero is needed to achieve a competitive current drive in Schottky FET devices. To obtain good electrostatic control for a Schottky FET with an extremely scaled gate length (<30 nanometers), the Schottky FET is fabricated on an extremely thin SOI substrate where the Si available for silicidation is less than about 10 nanometers. Moreover, a 600° Celsius drive-in anneal is required to diffuse implanted dopants (e.g., As for n-FETs) to the silicide/Si channel interface to achieve a sub-100 meV SBH at the S/D Schottky junction. Therefore, it would be desirable to make a silicide source/drain which is resistant to agglomeration at 600° Celsius that can also be fabricated on an extremely thin SOI substrate where the Si available for silicidation is less than about 10 nanometers.
Silicide formation typically requires depositing a transition metal such as Ni, Co or Ti, onto a wafer. Following deposition, the structure is then subjected to an annealing step using conventional processes such as rapid thermal annealing. During thermal annealing, the deposited metal reacts with the Si it is in direct contact with to form a metal silicide.
The term “agglomerate” is used herein to denote that a thin Ni silicide film (e.g. a film having a thickness of less than about 10 nanometers) tends to gather into masses or clusters at temperatures on the order of about 600° Celsius or higher. The agglomeration problem is not limited to Ni silicides. It typically occurs for various thin films other than NiSi and is worst for low melting point materials. Agglomeration is driven by a minimization of surface energy for the same volume of material and occurs for any thin film if the temperature is high enough for diffusion to allow the thin film to take a lower energy configuration. At a given temperature, agglomeration is more important for low melting point material as diffusion typically start around ⅔ of the melting point.
The term “substantially non-agglomerated” is used herein to denote that the resistivity of the epitaxial Ni silicide film remains below 100 microOhms-centimeter at a temperature above 600° Celsius.
Agglomeration is particularly problematic because the manufacture of a functioning device would benefit from processing steps after contact formation where the silicide temperature could withstand 600° Celsius. For instance, interface modification via dopants-segregation is one of the most promising ways to enable the use of one silicide for both types (p-FETs and n-FETs) of Schottky devices. However, to diffuse n-type dopants (e.g. As and/or P) into the silicide/Si interface and maximize the modification of the interface, at least 600° Celsius is needed. Currently, Ni—Pt silicides are used for advanced devices wherein Pt helps limit agglomeration of the silicide contact. However, even Ni—Pt silicides containing 5% or 10% Pt experience agglomeration at temperatures of about 600° Celsius when their thickness is less than about 10 nanometers.
In view of the above, it would be highly desirable to provide a thin Ni silicide contact in a Si-containing material that exhibits thermal stability at high temperatures (e.g. temperatures at or above 600° Celsius), while being easily fabricated utilizing well-known CMOS processing steps.